Computer arithmetic is the practice of performing mathematical operations in a computer. Originally proposed in 1945 by John von Neumann, an arithmetic logic unit (ALU) is a digital circuit that performs integer arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer. Data is provided as input to the ALU, an external control unit tells the ALU what operation to perform on that data, and then the ALU transforms the input data into an output. The input data are called the operands, and the output of the ALU is called the result. Each operation that the ALU is capable of performing may produce a different result for the same set of operands.
In modern computers, the integer operands are typically encoded into digital signals using well-known formats like two's complement or binary coded decimal. An ALU may also calculate with non-integer formats, but these types of ALU are usually given a more specific name. For example, an ALU that performs operations on floating point operands is typically called a floating point unit (FPU). In applicant's U.S. Pat. No. 7,949,700 entitled “Modal Interval Processor,” incorporated herein by reference, an ALU taking modal interval operands as input, performing a modal interval operation specified by a selector signal, and then producing a modal interval result is called a modal interval processing unit (MIPU).
Regardless of the formats that any particular type of ALU may calculate with, it is common in many ALU designs to also take as input or produce as output a set of condition codes. These codes may be used to indicate cases such as carry-in, carry-out, zero, parity, etc. However, another common use for these codes is to indicate the presence or absence of exceptional conditions.
An exception is a particular state that may occur in an ALU when an operation is performed on a specific set of operands. For example, the IEEE Standard for Floating Point Arithmetic (IEEE Std 754-2008 In IEEE Std 754-2008, Aug. 29, 2008, pp. 1-58), incorporated herein by reference, defines exactly five (5) exceptions known as Invalid Operation, Division by Zero, Overflow, Underflow and inexact. In the event any operation conforming to the standard reaches a state characterized by one of these five exceptional conditions, certain mechanisms are specified which allow a user to detect the exceptional condition. One mechanism specified by the standard is to require that a designated exception flag is set. Another mechanism requires the operation to encode a special non-numeric value known as a NaN (Not-a-Number) in the result. In the thriller case, a user may determine if an exception occurred during an operation by checking to see if the designated exception flag is set. In the latter case, the user may determine if an exception occurred by checking to see if the operation result is a NaN.
Similarly, applicant's U.S. Pat. No. 8,204,926 entitled “Reliable and Efficient Computation of Modal interval Arithmetic Operations,” incorporated herein by reference, discloses a set of digital circuits that allow certain exceptional conditions to be detected in various modal interval arithmetic operations. If an exception is detected, methods similar to those specified in IEEE 754-2008 may allow a user to determine if an exception occurred.
The focus of the present invention is an improved system and method of detecting exceptions in modal interval arithmetic operations (which includes but is not limited to the so-called. “classical” interval arithmetic, a distinction made and discussed in applicant's previously referenced patents). As shown in applicant's white paper entitled “Decorations as State Machine,” prior art methods of detecting exceptional conditions in interval operations lack several important properties that allow a user to detect certain types of exceptions or else have the potential to lose information about exceptions that may have occurred in prior operations. In the worst case, some prior art methods can under certain circumstances actually provide misleading information or even be totally incorrect. So there is still yet a need for a new and improved system and method to detect exceptional conditions in interval operations that overcome these limitations of prior art methods.